1. Field of the Invention
The present invention generally relates to serializer/deserializer integrated circuits with multiple high speed data ports, and more particularly to a serial and de-serializer chip that includes the functionality to switch between multiple high speed data ports.
2. Background Art
High speed data links transmit data from one location to another over transmission lines. These data links can include serializer data links that receive data in a parallel format and convert the data to a serial format for high speed transmission and deserializer data links that receive data in serial format and convert the data to a parallel format. Data links that include serializer and deserializer functionality are referred to as serializer/deserializer data links (i.e., SERDES). SERDES data links can be part of a backplane in a communications system (e.g., Tyco Backplane 30-inch trace).
In a high speed back plane configuration, it is often desirable to switch between multiple Serdes links. In other words, it is often desirable to switch between any one of multiple Serdes links to another Serdes link, and to do so in a low power configuration on a single integrated circuit.